As a bonus feature, AES has hardware support in Intel processors which implement the AES instruction set, with AMD support coming soon in their Bulldozer based processors.
The AES instructions set consists of six instructions.
Four instructions, namely AESENC, AESENCLAST, AESDEC, AESDECLAST, are
provided for data encryption and decryption (the names are short for
AES Encrypt Round, AES Encrypt Last Round, AES Decrypt Round, AES
Decrypt Last Round). These instructions have both register-register
and register-memory variants.
Two other instructions, namely AESIMC
and AESKEYGENASSIST are provided in order to assist with AES Key
Expansion (the names are short for AES Inverse Mix Columns, and AES
Key Generation Assist).
This Intel document also goes into some other potential benefits of using their instruction set
Beyond improving performance, the new instructions help address
recently discovered side channel attacks on AES. AES-NI instructions
perform the decryption and encryption completely in hardware without
the need for software lookup tables. Therefore using AES-NI can lower
the risk of side-channel attacks as well as greatly improve AES