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Mar 7, 2018 at 6:53 comment added forest It likely meant that no lookup tables are required in the cache, which is what side-channel attacks against AES often abuse.
Mar 16, 2017 at 5:50 vote accept RJL
Mar 16, 2017 at 5:50 vote accept RJL
Mar 16, 2017 at 5:50
Feb 23, 2017 at 8:26 vote accept RJL
Feb 23, 2017 at 8:26
Feb 5, 2017 at 13:10 comment added Peter Green Also having tables is not a problem per-se, what is a problem is having tables in memory that is not constant-time.
Feb 5, 2017 at 7:08 comment added user3201068 @MaartenBodewes Hardware implementations usually use boolean logic to save gate area, so it likely was lapsed from the technical writer's mind. AFAIK most FPGAs use table implementations.
Feb 4, 2017 at 16:27 comment added Maarten Bodewes "and since all the computations are performed internally by the hardware, no lookup tables are required" ... that's worded strangely. You can use or forgo tables in either hardware or software.
Feb 4, 2017 at 13:22 history edited SEJPM CC BY-SA 3.0
added explicit "yes"
Feb 4, 2017 at 12:42 history answered SEJPM CC BY-SA 3.0