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I'm studying CPA side channel attacks. CPA stands for Correlation Power analysis and it can be used to break AES. I'm familiar with the process to crack AES on a microcontroller. I was just wondering what the differences are if you try to do this on an FPGA.

Would it take longer? Are the number of traces required different? Do you need different tools? What are the most important differences?

Thanks for your help!

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