While reading specsheets for NXP processors (example mention in this PDF) the other day I saw the mention of the Indexed Code Book mode (ICB) for their AES acceleration hardware - the only mode they claim side-channel resistance for.
However, my search attempts have failed me and I could not identify a definition of this mode.
So, how is Indexed Code Book Mode defined?
I also found a related (?) LRICB mode if that helps in this PDF.